There's a shift happening in silicon engineering—and it's happening fast.
Over the past year, I've had the privilege of delivering GenAI workshops to hundreds of engineers at one of the world's leading technology companies. The reaction is always the same: initial skepticism, followed by genuine surprise, then excitement.
"I didn't realize it could do that."
That sentence—spoken by circuit designers, RTL engineers, DV leads, and physical design experts alike—captures exactly where our industry stands today. Most silicon engineers have heard about large language models. Many have tried ChatGPT for writing emails or explaining code. But very few have experienced what's possible when AI becomes an agentic partner in their actual workflow.
This workshop exists to close that gap.
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Why This Matters Now
The semiconductor industry is facing unprecedented pressure. Design complexity is exploding. Schedules are compressing. Talent is scarce. And the engineers we do have are spending significant time on tasks that, frankly, don't require their hard-won expertise.
Writing boilerplate testbenches. Generating SPICE netlists from specs. Converting between coding styles. Documenting what the code already says.
These tasks are necessary—but they're not where your best engineers add unique value.
Here's what you would observe in these workshops:
A senior circuit designer generates a complete netlist, simulated it, and iterates on the results—all in under five minutes. A task that would normally be 30+ minutes of typing and context-switching.
An RTL engineer uses AI to generate a parameterized FIFO with testbench, runs the simulation, and views waveforms—in a single conversational flow. No copy-pasting. No switching between tools.
A verification engineer asks for SystemVerilog assertions based on a plain-English description of the protocol behavior. The AI not only generates correct SVA syntax but explains the temporal operators it used.
These aren't edge cases. This is what's possible today—with tools that are available right now. You will see it for real by going through the workshop.
The Real Competitive Advantage
Let me be direct: AI won't replace silicon engineers.
The physics of transistors, the art of analog design, the intuition built over years of debugging—these aren't going away. If anything, they become more valuable when engineers are freed from mechanical tasks.
But here's what will happen:
Engineers who learn to leverage AI will dramatically outperform those who don't.
They'll produce more. They'll iterate faster. They'll have more time for the creative, high-judgment work that actually moves projects forward. And the teams and companies that embrace this shift will have a significant competitive edge.
The question isn't whether AI will transform chip design. It already is. The question is whether your team will be leading that transformation—or scrambling to catch up.
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What Makes This Workshop Different
There's no shortage of AI tutorials online. So why this one?
It's built by silicon engineers, for silicon engineers. Every exercise is grounded in real tasks: generating SPICE netlists, writing Verilog, creating testbenches, debugging timing issues. Not generic coding examples—actual semiconductor workflows.
It's hands-on, not theoretical. You won't just read about what AI can do. You'll do it yourself—in your terminal, with Claude Code, on real problems. Clone the repo, open it in Claude Code, and work through exercises you can immediately apply to your own projects. Each module takes about 30 minutes.
It covers the full spectrum. From circuit design to RTL, DV to physical design, DFT to STA, documentation to workflow automation—we've built modules for every major discipline. Engineers can focus on their domain while also exploring adjacent areas.
It teaches you to work with AI, not just use it. The workshop covers effective prompting, understanding limitations, iterating on results, and developing the kind of working relationship with AI that actually improves your productivity.
It runs on tools you already have. Mac terminal. Linux. Open-source simulators and compilers. I deliberately used accessible tools—ngspice, Icarus Verilog, Verilator—so you can start immediately without license hurdles. And if you have commercial tools? The exercises adapt. Tweak the prompts, give Claude Code more context about your environment, and it will work with what you've got.
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A Message for Engineering Leaders
If you're a director, VP, or engineering manager reading this: the decisions you make in the next 12-18 months about AI adoption will have lasting consequences.
I've seen teams where one or two engineers start using AI tools and immediately become 2-3x more productive on certain tasks. Their colleagues notice. Within weeks, adoption spreads organically. Those teams are now months ahead of where they would have been.
I've also seen teams where leadership dismissed AI as "hype" or "not ready for serious work." Those teams are still doing things the old way. And they're starting to feel the gap.
The workshop is free. It's self-guided. It takes half a day to complete the core modules. The only investment is your engineers' time—and the return on that investment starts immediately.
Share this with your team. Block an afternoon. Do it together.
The engineers who go through this workshop will come out with concrete skills they can use the next day. And you'll have a team that's positioned to lead, not follow, as AI reshapes our industry.
What You'll Learn
The workshop is structured in progressive modules:
- LLM Fundamentals — How these models work, effective prompting strategies, understanding limitations (essential context for everything that follows)
- Circuit Design — Generate SPICE netlists, simulate with ngspice, iterate on designs
- RTL Development — Create Verilog modules, synthesize, debug with AI assistance
- Design Verification — Generate testbenches, write assertions, understand coverage concepts
- Physical Design — Floorplanning, timing analysis, constraint generation
- DFT, STA, Layout — Specialized modules for each discipline
- Documentation & Automation — Specs, reports, scripts, and workflow optimization
- Management — Planning, communication, and leveraging AI for engineering leadership
Each module includes tutorials for engineers exploring outside their primary domain. A DV engineer curious about circuit design can follow along. An RTL engineer interested in physical design can explore those exercises.
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The Engineers Who Move First
In every technology transition, there are engineers who move first. They experiment early. They build intuition while others are still debating. They become the experts their teams rely on.
Those engineers are taking this workshop now.
They're discovering that AI isn't a threat to their expertise—it's an amplifier. It handles the tedious parts so they can focus on the hard problems. It accelerates iteration so they can explore more of the design space. It gives them leverage they didn't have before.
And they're having fun doing it. Because when you strip away the repetitive tasks, what's left is the work that drew most of us to this field in the first place: solving hard problems, building things that matter, pushing the boundaries of what's possible.
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Get Started Today
The workshop is available now on GitHub: AIDAChipWorkshop01
Prerequisites: Claude Code installed on your machine.
To begin: 1. Clone the repo 2. Open the folder in Claude Code 3. Start with the README.md file and fundamentals then choose a module that matches your discipline
It's self-paced, and designed to fit into your schedule. Complete one module or all of them. Work alone or with your team. The skills you build are immediately applicable.
And if you find it valuable—share it. With your team. With your peers. With the engineers you know who are curious about AI but haven't found the right way in.
This is how our industry moves forward: one engineer at a time, building skills, sharing knowledge, raising the bar for what's possible.
We're excited to be part of that journey with you.
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Follow AIDAChip for more insights on AI-driven chip design: - Website: aidachip.com - LinkedIn: AIDAChip - Email: hello@aidachip.com
Have feedback on the workshop? Reach out—we'd love to hear from you.
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About the Author: Khaled Alashmouny is the Founder of AIDAChip. Over 20 years in semiconductors—including 13 years leading analog/mixed-signal teams—he has delivered GenAI workshops to hundreds of engineers at Apple. AIDAChip is building Multiplayer AI for chip design teams.